1A Processor: Testing and Integration

Planning for system integration and testing started at the beginning of the 1A Processor 1 development. Much of this planning was based on experience gained in the development of No. 1 ESS2 and other stored program systems. 3,4 This experience indicated that the availability of high-quality tests, test facilities, and comprehensive test plans are critical to the orderly development of a high-quality system. In the development of the 1A Processor, tests and test facilities were designed concurrently with the design of the processor hardware and software. The objectives were timely integration of hardware and software components into a working system and thorough verification of the hardware and software designs. The general approach to integration of the processor system was to design and test in parallel the various system components and to integrate incrementally these components into a working system. This paper describes the integration process in terms of three levels, namely: (i) Circuit-pack verification and testing. (it) Frame verification and testing. (iii) System integration and testing. 289