28Gb/s PDM-QPSK coherent receiver using SiGe ADCs and FPGA for processing of all received data
04 March 2012
Using an integrated coherent front end, four high speed ADCs and powerful FPGA, a fully reprogrammable coherent receiver is reported and impact of various parameters on system performance are measured. OCIS codes: (000.0000) General; (000.0000) General [8-pt. type. For codes, see www.opticsinfobase.org/submit/ocis.]