64 Gb/s Duobinary Transmission for Chip-to-Module Electrical Communication

This paper presents a theoretical comparison between traditional non-return-to-zero, PAM4 and duobinary signaling as ways to achieve high serial data rates over copper. From this analysis, the channels for which duobinary is able to provide the optimal solution are discussed. A practical proof of the merits of duobinary is given by means of a custom duobinary chipset which was used to demonstrate for the first time a 64 Gb/s errorfree duobinary chip-to-module transmission through a prototype backplane connector.