A 10Mb/s Manchester Data Decoder for Burst Mode Operation
15 February 1989
A monolithic CMOS circuit that can recover the clock and decode 10Mb/s Manchester data into NRZ data has been developed. Utilization of analog delay-locked-loop referenced timing elements allows complete synchronization to incoming data in 1 mid-bit transition, which is particularly useful in burst-mode applications. The circuit is implemented in a 1.75microns CMOS process, occupies 12mm sup 2 of silicon area, and consumes 250mW from a 5 volt supply.