A 3.2 GOPS Multiprocessor DSP for Communication Applications
01 January 2000
A multiprocessor DSP chip with four programmable processing elements and a global resource controller connected to a high performance split-transaction bus is reported. The 207mm sup 2 0.25microns CMOS chip achieves 1.6 Billion 16-b MAC/s at 100MHz operation with 3.3V.