A 36ns Radiation Hard 256k x 1 SRAM

a 256K x 1 SRAM has been designed and fabricated using a radiation hard 1.0micron CMOS technology. Typical measured performance values include an address-activated access time of 36 nsec and a write time of 34 nsec. Soft-error studies predict the memory cell to be SEU insensitive, rail-span collapse simulations estimate transient dose immunity to greater than 4x10 sup 9 rads(Si)/sec; and circuit simulations indicate that the part will meet all performance goals after total dose radiation of 1x10 sup 6 rads(Si). The total dose expectations have been reinforced by measurements of other memory devices fabricated with this technology. Summaries of the operational and radiation goals for the 256K SRAM are shown in Figures 1 and 2.