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A bipolar-CMOS-DMOS integrated circuit technology in dielectrically isolated wafer with applications to access and break switch arrays.

01 January 1987

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This work reports a dielectrically isolated high voltage Bipolar- CMOS-Dmos (BCDMOS) integrated circuit technology which has been successfully developed to handle several hundreds of volts. This technology integrates Bipolar, CMOS, DMOS, PNPN. and JFET devices on a single chip. The BCDMOS process is chosen to be an optimized poly-gate N-channel DMOS process; additive levels and their relative sequences are judiciously chosen by critical examination on their influences and trade-offs in the performance among various kinds of devices in the chip. The characteristics of devices and process parameters of the major devices in ASA/BSA are described. The successful applications of this technology to Access Switch Array and Break Switch Array chips, which are solid state switches designed to perform the per line battery-feed connection, test and ringing access function for the analog line interface circuit of the 5ESS (TM) Integrated Service Line Unit (ISLU), have been demonstrated.