A compact test structure for characterisation of leakage currents in sub-micron CMOS technologies
01 December 2001
This paper presents a compact test structure for the characterisation and modelling of leakage currents in sub-micron CMOS technologies, with which all leakage components can be directly extracted automatically and input/output influence is cancelled. The test structure can also be used for measurement of intrinsic I-ddq for defect detection. (C) 2001 Elsevier Science Ltd. All rights reserved.