A Family of Fault Simulators in the Mars Hardware Accelerator

MARS (Microprogrammable Accelerator for Rapid Simulations) is a hardware accelerator designed at AT&T Bell Laboratories [ADE87], [ADF87]. The novelties of MARS are its flexibility, reconfigurability and the supercomputer- like performance for CAD applications. Last summer, we were successful in demonstrating a working prototype of the system. We have implemented a number of logic simulation algorithms on the prototype [ADT87]. Performance measurements on the multiple delay logic simulator indicates a speedup of more than 200 times over an in-house software simulator MARS simulations preserve the accuracy and produce bit-by-bit parity in the results with those of the software simulator.