A High Performance Generic System Architecture for Signal Processing Applications

Signal processing algorithms are computational intensive. They are characterized by a large amount of parallelism and are described efficiently by a data-flow graph. Extensive research has been conducted in the mapping of these algorithms onto existing parallel computers. One bottleneck is the high cost of communications, which reduce the number of parallel tasks and limit the system performance. A second bottleneck is that the processing elements are not well matched to the operations involved in the algorithm. This presents generic system architectures for high performance "special purpose architectures".