A high speed GaAs 1K static random access memory.

A high performance 1024 x 1 bit static random access memory (RAM) has been designed and fabricated using an epitaxial GaAs direct coupled logic (DCFL) process. Design rules include 4 microns interconnect metallization lines and spaces with 2 x 4 microns(2) vias. MESFETs have 1 micron gate length and a self-aligned source and drain. A minimum address access time of 1.7 ns has been observed.