A Methodology for Studying Performance of WE(R) 32100-based Single Board Computer Systems

In this paper we provide a methodology for studying the performance of WE 32100-based single board computer systems. The methodology relies on a behavioral simulator as well as analytical models. A number of architectural issues such as: memory speeds, block fetch versus no block fetch, cache, and the loading strategy of user processes were studied through simulation and results were obtained that enable designers to make cost/benefit tradeoffs decisions. Also, a queueing model of a one disk controller system was constructed and the effects of bus contention were evaluated.