A new simulated annealing algorithm for standard cell placement.

Simulated annealing is a powerful general purpose optimization technique, based on the annealing process used for crystallization in physical systems. Its main disadvantage is the long time it takes to converge. In this paper I show that the simulated annealing algorithm can tolerate errors in cost calculations of the order of the temperature. This result can be used to reduce the computer time the algorithm takes, by doing cost calculations approximately instead of exactly. I have used this idea for a standard cell placement algorithm in a VLSI layout system, and have obtained a 20-45% improvement in routing area as compared to the existing placement algorithm in LTX2.