A Pipelined 32b CMOS Microprocessor

The implementation and architecture of a 172,163 transistor single-chip general purpose microprocessor will be described. The 16 Mhz chip is fabricated using a single-metal double-poly 1.5 micron CMOS technology and is capable of a peak execution rate of over 1 instruction/clock. Multiple on-chip caches, pipelining and a 1-cycle IO protocol are employed.