A Robust Architecture for Flipflops Tolerant to Soft Errors and Transients from Combinational Circuits
01 January 2008
Soft errors are a leading cause of reliability issue during field operations. High energy particles either from cosmic rays or from impurities in the packaging material can disrupt the charge stored in the internal node capacitances leading to the malfunction of the device. Although it is usually a temporary effect, it may lead to silent data corruption(SDC) when not detected in time. SDC may be detrimental to many real- time commercial applications of the device and demands an effective solution interms of various design overheads. In this paper, we propose two novel flipflop designs aimed at detecting and correcting soft errors and transients from combinational circuits. Each design is optimized for a different set of constraints and they have overheads of 40% and 21% as compared to standard commercial design of a scan fliplfop.