An Analog/Digital BCDMOS Technology With Dielectric Isolation - Devices and Processes
01 January 1988
This work reports on a dielectrically isolated bipolar-CMOS-DMOS (BCDMOS) integrated-circuit technology that has been successfully developed for high-voltage applications (150-500 V). This technology integrates bipolar, CMOS, DMOS, p-n-p-n, JFET, and DGDMOS devices on a single chip. The core BCDMOS process in chosen to be an optimized poly-gate n-channel DMOS process; additional levels and their relative sequences were judiciously chosen by critical examination on their influences and trade-offs in the performance among various kinds of devices in the chip. The characteristics of the major devices in solid-state switches for telecommunication applications are demonstrated.