Analog CMOS Neural Network with 32k Connections and a Programmable Architecture
14 February 1990
The neural network, implemented in CMOS technology, contains 256 'neurons', each with 128 binary, programmable connections. The network architecture is programmable, single-layer networks and multi-layer networks with binary or with analog connections can be configured. The computing speed is over 100 billion connections per sec and the circuit consumes less than 800 mW.