Analysis of 'Thin Chrome' on Photomasks

Introduction: The fabrication of photolithographic masks for VLSI circuit fabrication follows a well developed processing technology outlined in Table 1. Yet, as device dimensions shrink, it becomes necessary to re-examine the conditions and procedures involved in fabricating the chromium masks in an effort to minimize mask defect density. Since the master mask pattern is replicated in the chip, any printable defect on the mask will result in faulty circuit performance, increased fabrication cost, and decreased yields.