Application of Buried Vias to Printed Wiring Board (PWB) Chip Packages
01 January 1986
Introduction: Today's PWB manufacturers are constantly faced with the increasing demand for developing new packaging techniques due to the rapid change in semiconductor technology. Demand for finer lines, smaller holes (vias), and improved material properties are becoming more and more prevalent in the ever changing world of PWB technology. Packaging demands for VLSI devices have been growing in AT&T for the past couple of years.