Chip equalisation for third generation MIMO high data rate applications

A chip equaliser structure for multi-in-multi-out (MIMO) channels is described. The equaliser is trained adaptively from a continuous, low-power, code-multiplexed pilot signal and is suitable for high data rate applications such as those proposed for third generation mobile telephony systems. The equaliser tap-update algorithm utilizes a pilot correlator to reduce adaptation noise, resulting in more rapid convergence and lower residual MSE.