A 'benchtop' 7.7Gb/s regenerator was designed to achieve optical transmission through 43km of fiber.
A 'benchtop' 7.7Gb/s regenerator was designed to achieve optical transmission through 43km of fiber.
Very high-speed digital subscriber line (VDSL) technology can deliver data at multi-Mbits/s over the unshielded, twisted pair in overlay to the plain old telephone service (POTS) and ISDN services.
In this paper we present a design for an 8 bit x 8 bit parallel pipeline multiplier for high-speed digital signal processing applications. The multiplier is pipelined at the bit level.
A transmitter and receiver phased array chipset is demonstrated in the range between 70 and 100GHz using a 0.18&μm SiGe BiCMOS process with fT / fMAX of 240/270GHz.
To date, distributed amplifiers based on HBTs have consistently shown lower gain-bandwidth products than their HEMT counterparts.
To support continuous bandwidth growth of next-generation high-speed serial links, moderate-resolution energy-efficient gigahertz-sampling-rate ADCs are highly demanded.
When a Ni - 0.8% Au alloy is annealed at temperatures above 400C, Au segregates at the Ni(100) surface to form an overlayer providing 1.0 +- 0.05 monolayer coverage.
We report a 8/spl times/8 switch based on a novel MOEMS technology allowing wide bandwidth (1300-1650 nm), fast switching (50 dB) and high modularity.