One of the most challenging technology issues in multilevel metallization is the choice of an appropriate intermetal dielectric material and its associated processing.
A 0.3 um CMOS user programmable PLL frequency synthesizer is designed to operate at low voltage (1.0-1.8V) and cover a wide range of operating frequencies for multiple applications.
This paper presents a 1.25 GS/s 7 b single-channel Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) that achieves a low input frequency SNDR/SFDR of 41.4/51 dB, while the S
A general ring oscillator topology for multiphase outputs is presented and analyzed, The topology uses the interpolating inverter stages to construct fast subfeedback loops for long chain rings to
This paper presents a 4th order continuous-time bandpass delta-sigma modulator (CT-BPDSM) with a programmable center frequency ranging from 1.55 GHz to 2.45 GHz.
We propose and demonstrate the first semiconductor - optical- fiber ring laser.
A static 1/2-frequency divider is implemented in standard 0. 25 micron digital CMOS and is measured to be working to over 16.8 GHz with a 1.8 V supply while consuming about 3 mW.
The achievable quality factors (Q) of on-chip inductors fabricated with standard Si technology are limited.
A novel, low power, downstream clock and data recovery (CDR)- decimator architecture is proposed for next generation, energy efficient 10 Gb/s optical network units (ONUs).
A Laser Driver IC for 10 Gb/s --SONET OC-192-- fiber optic transmitters is described.
