We report the design, fabrication, and characterization of a low voltage, low crosstalk 16X16 dilated Benes photonic switch array.
A pulse-width and pulse-position modulator (PWPM) IC for RF carriers from 170 MHz to 2.8 GHz is presented.
This paper presents a silicon device that performs ML detection and produces soft outputs approximating the log-likelihood ratios (LLRs) of the a posteriori probabilities (APPs) for each of the tra
A four-channel DEMUX for 40 Gbit/s fiber-optic applications is implemented in an InP-based HBT technology.
We have built and tested a 64 by 32 array of symmetric self electro-optic effect devices, each of which can be operated as a memory element or logic gate.
Alternating phase shift technology has been shown to substantially improve focus latitude and resolution for several years.
We show, within the circuit model, how any quantum computation can be efficiently performed using states with only real amplitudes (a result known within the Quantum Turing Machine model).
The clock-recovery PLL requires >50% VCO tuning range to accommodate CMOS process variations.
A general-purpose phase-locked loop with programmable bit rates is presented demonstrating that large frequency tuning range, large power supply range, and low jitter can be achieved simultaneously
In this paper we present a two-channel demonstration of differential frequency-deviation multiplexing (DFDM).
