A 256K x 1 SRAM has been designed and fabricated using a radiation hard 1.0micron CMOS technology.
This paper proposes a 3D map augmented photo gallery mobile application that allows user to virtually transit from 2D image space to the 3D map space, to expand the field of view to surrounding env
A CMOS limiting amplifier with a bandwidth of 3 GHz, a gain of 32 dB, and a sensitivity of 2.2 mV sub (pp) (@ BER = 10 sup (-12)) consumes 53mW and is fabricated in a standard 2.5 V, 0.25 micron CM
A 125Mbaud receiver for 10/100 fast ethernet has been implemented in a 3V 0.25microns digital CMOS process.
A high speed laser-driver IC has been fabricated using etched- gate, enhancement/depletion mode MESFET technology.
A fully differential master-slave track-and-hold amplifier is designed and fabricated with a 320-GHz-fT-InP DHBT process.
We propose an adaptive fixed code-excited linear prediction (AF-CELP) speech coder operating at 4 kbps.
We have designed and built an integrated balanced optical front end suitable for detecting RZ-DPSK transmissions when used with an external delay-interferometer.
We have designed and built an integrated balanced optical front end suitable for detecting RZDPSK transmissions when used with an external delay-interferometer.
A fully differential 40 Gsample/s Track and Hold Amplifier (THA) with high dynamic range and large bandwidth is designed and fabricated in a 210 GHz-fT -InP-DHBT process.
